Methods of counter-doping collector regions in bipolar transistors

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United States of America Patent

PATENT NO 8035196
SERIAL NO

12061264

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Abstract

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The present invention provides a method of forming a bipolar transistor. The method includes doping a silicon layer with a first type of dopant and performing a first implant process to implant dopant of a second type opposite the first type in the silicon layer. The implanted dopant has a first dopant profile in the silicon layer. The method also includes performing a second implant process to implant additional dopant of the second type in the silicon layer. The additional implanted dopant has a second dopant profile in the silicon layer different than the first dopant profile. The method further includes growing an insulating layer formed over the silicon layer by consuming a portion of the silicon layer and the first type of dopant.

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Patent Owner(s)

Patent OwnerAddress
MICROSEMI SEMICONDUCTOR (U S ) INC4509 FREIDRICH LANE BUILDING 2 AUSTIN TX 78744

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Krutsick, Thomas J Fleetwood, US 21 136
Speyer, Christopher J Spicewood, US 3 6

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