Interface circuit
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United States of America Patent
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Sep 13, 2011
Grant Date -
Jun 9, 2011
app pub date -
Jun 9, 2010
filing date -
Jun 30, 2003
priority date (Note) -
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status (Latency Note)
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Abstract
An interface of the present invention includes a first inverter circuit that inverts a logic level of an input signal given to an external input terminal and outputs the inverted logic level, a second inverter circuit that outputs a potential in which a logic level of an output signal of the first inverter circuit is inverted, that is, a potential higher or lower than a logic of an input signal applied to the first inverter circuit by the amount of a predetermined potential, and a feedback path that positive feedbacks an output signal of the second inverter circuit to the external input terminal. The interface circuit of the invention positive-feedbacks a potential of the output signal of the second inverter circuit and shifts the potential of the external input terminal in a floating state to an H or L level potential.
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