Semiconductor chip with seal ring and sacrificial corner pattern

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8018030
APP PUB NO 20090189245A1
SERIAL NO

12410170

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A semiconductor device according to the invention is a semiconductor device which includes a low dielectric constant film of which the relative dielectric constant is less than 3.5, is provided with one or more seal rings that are moisture blocking walls in closed loop form in a plan view, and where at least one of the seal rings includes a seal ring protrusion portion in inward protruding form in the vicinity of a chip corner.

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Patent Owner(s)

Patent OwnerAddress
ACACIA RESEARCH GROUP LLC767 3RD AVE 6TH FLOOR NEW YORK NY 10017

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Furusawa, Takeshi Tokyo, JP 60 732
Goto, Kinya Tokyo, JP 20 152
Matsuura, Masazumi Tokyo, JP 45 973
Miura, Noriko Tokyo, JP 26 176

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  • 4 Citation Count
  • H01L Class
  • 3.01 % this patent is cited more than
  • 14 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges1702407123365539219115410570614515901 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +0200400600800100012001400160018002000220024002600

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