Semiconductor device and method for fabricating the same

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United States of America Patent

PATENT NO 8013361
APP PUB NO 20060097294A1
SERIAL NO

11270602

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Abstract

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F can be located apart from active regions of a substrate for MOS transistors. This suppresses the influence of the increased gate length due to hammerhead and gate flaring. As a result, transistors TrA through TrF can have substantially the same finished gate length.

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Patent Owner(s)

Patent OwnerAddress
PANNOVA SEMIC LLC3945 FREEDOM CIRCLE SUITE 900 SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Arai, Katsuya Kyoto, JP 37 445
Ikoma, Daisaku Osaka, JP 15 266
Otani, Katsuhiro Nara, JP 3 69
Yamashita, Kyoji Kyoto, JP 58 997

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