Semiconductor device and manufacturing method thereof

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United States of America Patent

PATENT NO 8003444
APP PUB NO 20070181983A1
SERIAL NO

11501325

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Abstract

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A method of manufacturing a semiconductor device 28 in which a plating mask 38, 39 having a noble metal plating layer 35 as an uppermost layer is formed at a predetermined portion on an obverse surface side or a reverse surface side of a leadframe material 10, and the leadframe material 10 is consecutively subjected to etching by using the plating mask 38, 39 as a resist mask, so as to form external connection terminal portions 22 which electrically communicate with a semiconductor element 18 disposed in an interior of an encapsulating resin 21, and which project downwardly. Base metal plating or noble metal plating 33 exhibiting etching solution resistance is provided as a lowermost layer of the plating mask 38, 39.

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Patent Owner(s)

Patent OwnerAddress
MITSUI HIGH-TEC INC10-1 KOMINE 2-CHOME YAHATANISHI-KU KITAKYUSHU-SHI FUKUOKA 807-8588

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hirashima, Tetsuyuki Fukuoka, JP 2 63
Takai, Keiji Fukuoka, JP 7 257

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  • 2 Citation Count
  • H01L Class
  • 3.01 % this patent is cited more than
  • 14 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges1702407123365539219115410570614515901 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +0200400600800100012001400160018002000220024002600

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