Parallel analog-digital converter with dual static ladder
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United States of America Patent
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Aug 16, 2011
Grant Date -
Apr 8, 2010
app pub date -
Mar 13, 2008
filing date -
Mar 16, 2007
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Expired
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Abstract
of rank N−j+1 of a second network. This reduces the first and second order non-linearity effects due to the fact that the differential amplifiers consume an input current tapped off from the networks of resistors.
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