Edge rate suppression for open drain buses
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United States of America Patent
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Aug 16, 2011
Grant Date -
Jun 9, 2011
app pub date -
Dec 3, 2009
filing date -
Dec 3, 2009
priority date (Note) -
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Abstract
An edge rate suppression circuit arrangement is provided for operation with an open drain bus. The circuit arrangement includes a variable resistive circuit having an input for receiving a variable voltage signal and an output coupled to the open drain bus, and a control circuit configured to operate the variable resistive circuit. The control circuit operates the variable resistive circuit in respective high and low resistance states in response to the variable voltage signal.
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