Method of manufacturing CMOS devices by the implantation of N- and P-type cluster ions
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United States of America Patent
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Aug 9, 2011
Grant Date -
May 10, 2007
app pub date -
Dec 29, 2006
filing date -
Jun 26, 2002
priority date (Note) -
Expired
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Abstract
A method of manufacturing a semiconductor device is further described, comprising the steps of providing a supply of dopant atoms or molecules into an ionization chamber, combining the dopant atoms or molecules into clusters containing a plurality of dopant atoms, ionizing the dopant clusters into dopant cluster ions, extracting and accelerating the dopant cluster ions with an electric field, selecting the desired cluster ion by mass analysis, modifying the final implant energy of the cluster ion through post-analysis ion optics, and implanting the dopant cluster ions into a semiconductor substrate. In general, dopant clusters contain n dopant atoms where n can be 2, 3, 4 or any integer number. This method provides the advantages of increasing the dopant dose rate to n times the implantation current with an equivalent per dopant atom energy of 1/n times the cluster implantation energy. This is an effective method for making shallow transistor junctions, where it is desired to implant with a low energy per dopant atom.
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