Interposer for connecting plurality of chips and method for manufacturing the same
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United States of America Patent
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Aug 2, 2011
Grant Date -
Mar 12, 2009
app pub date -
Nov 19, 2008
filing date -
Jan 29, 2007
priority date (Note) -
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Abstract
The invention discloses an interposer used for connecting a plurality of chips. The interposer includes a connective substrate and at least a through via disposed in the connective substrate. The connective substrate has a first surface and a second surface. The through via acts as a connector, and is electrically connected to the first surface and the second surface. The first surface and the second surface are electrically connected to at least a first chip and a second chip respectively. In addition, the first chip and the second chip are electrically connected by the through via.
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