Systems and methods for test time outlier detection and correction in integrated circuit testing

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United States of America Patent

PATENT NO 7969174
APP PUB NO 20090192754A1
SERIAL NO

12418024

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Abstract

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Methods and systems for semiconductor testing are disclosed. In one embodiment, devices which are testing too slowly are prevented from completing testing, thereby allowing untested devices to begin testing sooner.

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Patent Owner(s)

Patent OwnerAddress
OPTIMAL PLUS LTD26 HA'ROKMIN ST HOLON 5885849

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Balog, Gil Jerusalem, IL 18 134
Golan, Avi Tel Aviv, IL 8 65
Linde, Reed El Dorado Hills, US 13 144

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