Junction field effect transistor (JFET) structure having top-to-bottom gate tie and method of manufacture
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United States of America Patent
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May 17, 2011
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N/A
app pub date -
Dec 17, 2008
filing date -
Dec 17, 2008
priority date (Note) -
Expired
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Abstract
A junction field effect transistor (JFET) can include a top gate structure and an active semiconductor region. The active semiconductor region can include a side surface and a top surface formed below the top gate structure. The active semiconductor region can also include a channel region formed below the top gate structure, a bottom gate region formed below the channel region, and a gate tie region formed on the side surface that makes an electrical connection between the top gate structure and the bottom gate region.
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