Junction-free NAND flash memory and fabricating method thereof
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United States of America Patent
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Mar 29, 2011
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app pub date -
May 19, 2009
filing date -
May 19, 2009
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Abstract
A junction-free NAND flash memory is described, including a substrate, memory cells, source/drain inducing (SDI) gates electrically connected with each other, and a dielectric material layer. The memory cells are disposed on the substrate, wherein each memory cell includes a charge storage layer. Each SDI gate is disposed between two neighboring memory cells. The dielectric material layer is disposed between the memory cells and the SDI gates and between the SDI gates and the substrate.
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