Semiconductor device having wirings formed by damascene and its manufacture method
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United States of America Patent
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Mar 15, 2011
Grant Date -
Sep 20, 2007
app pub date -
Sep 5, 2006
filing date -
Mar 20, 2006
priority date (Note) -
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status (Latency Note)
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Abstract
A via hole is formed in the interlayer insulating film on a semiconductor substrate, the via hole reaching the bottom of the interlayer insulating film. A filling member fills a lower partial space in the via hole. A wiring trench continuous with the via hole as viewed in plan is formed, the wiring trench reaching partway in a thickness direction. The wiring trench is formed under the condition that an etching rate of the interlayer insulating film is faster than that of the filling member, in such a manner that a height difference between the upper surface of the filling member and the bottom of the wiring trench is half or less than half the maximum size of a plan shape of the via hole. The filling member in the via hole is removed. The inside of the via hole and wiring trench is filled with a conductive member.
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