High slew rate amplifier, analog-to-digital converter using same, CMOS imager using the analog-to-digital converter and related methods
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United States of America Patent
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Mar 1, 2011
Grant Date -
Oct 29, 2009
app pub date -
Jul 7, 2009
filing date -
Apr 10, 2007
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Abstract
An amplifier, which may be used in a pipelined analog-to-digital converter, includes a first amplifier stage driving a second amplifier stage. At least one compensation capacitor is coupled to provide negative feedback through the capacitor from the second amplifier stage to the first amplifier stage. The slew rate of the amplifier is enhanced by substantially reducing the negative feedback coupled through the capacitor during a period following the transition of a signal applied to an input terminal of the amplifier. If the first stage of the amplifier has complementary signal nodes, the negative feedback coupled through the capacitor may be reduced, for example, by closing a switch coupled between first and second complementary nodes of the first amplifier stage.
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