Method and apparatus for dynamic threshold voltage control of MOS transistors in dynamic logic circuits
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United States of America Patent
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Mar 1, 2011
Grant Date -
Oct 4, 2007
app pub date -
Mar 9, 2007
filing date -
Jan 4, 2005
priority date (Note) -
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Abstract
Metal-oxide semiconductor (MOS) transistors that are operable at voltages below 1.5V, that are area efficient, and that exhibit improved drive strength and leakage current that are disclosed. A dynamic threshold voltage control scheme is used that does not require a change to existing MOS technology processes. Threshold voltage of the transistor is controlled, such that in the Off state, the threshold voltage of the transistor is set high, keeping the transistor leakage to a small value. The advantages provided by apply to dynamic logic, as well as in the specific well separation imposed by design rules because well potential difference are lower than the supply voltage swing.
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