DC offset cancellation circuit for modulator using 1-bit signal conversion

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United States of America Patent

PATENT NO 7893787
APP PUB NO 20090261918A1
SERIAL NO

11996477

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A DC offset cancellation circuit used for compensating a carrier leak at an output signal of a modulator has a sign extraction unit for extracting sign of an information signal which is applied to the modulator, an envelope detecting unit for performing envelope detection on the output signal of the modulator to output the resulting envelope, a slope detecting unit for performing polarity detection on the slope of the envelope; and a signal processing unit for generating a DC offset cancellation signal for compensating the carrier leak based on the result of the sign extraction and the result of the polarity detection. The signal processing unit preferably calculates the DC offset cancellation signal by multiplying the sign of the information signal by the polarity of the slope of the envelope and accumulating the result of multiplication.

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Patent Owner(s)

Patent OwnerAddress
NEC CORPORATIONTOKYO 108-8001

International Classification(s)

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  • 2005 Application Filing Year
  • H03C Class
  • 96 Applications Filed
  • 48 Patents Issued To-Date
  • 50 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances200520062007200820092010201120122013201420150255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Walkington, Robert Minato-ku, JP 2 19

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  • 2 Citation Count
  • H03C Class
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  • 14 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges309622341 - 1011 - 2021 - 3031 - 4041 - 5091 - 100100 +02468101214161820222426283032

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