Power-on reset circuit
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United States of America Patent
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Jan 25, 2011
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N/A
app pub date -
Mar 2, 2009
filing date -
Feb 29, 2008
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Abstract
A power-on reset circuit produces a reset signal output configured by an upper trip-point in an input hysteresis characteristic of the circuit. The upper trip-point is configured by resistances of a first pair of resistors coupled in series at an internal voltage reference node. A temperature coefficient of the upper trip-point is configured by resistance values of a second pair of resistors where each resistor is coupled with a corresponding switching device with an associated switching threshold. A magnitude of the input hysteresis characteristic is configured by resistances of a third pair of resistors in series. The magnitude of hysteresis is configured independent of configuring either the level or the temperature coefficient of the upper trip-point.
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