Package structure and method for chip with two arrays of bonding pads on BGA substrate for preventing gold bonding wires from collapse
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United States of America Patent
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Jan 4, 2011
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N/A
app pub date -
Jan 9, 2008
filing date -
Feb 2, 2007
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Abstract
A package structure and method for preventing gold bonding wires from collapsing are disclosed. The structure is especially useful for those chips whose two n×1 arrays of bonding pads are on the chip center to be packaged on a BGA substrate. According to the first preferred embodiment, two dies having a redistribution layer formed thereon are introduced outer the bonding pad array on the chip so that the gold bonding wires can be divided into two sections each to connect the bonding pads with the redistribution layer and the redistribution layer with the gold fingers on the BGA substrate. According to the second embodiment, the gold bonding wires are fixed by the epoxy strips on the chips after bonding the bonding pads to the gold fingers but before pouring liquid encapsulated epoxy into a mold.
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