Method for testing and programming memory devices and system for same
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Dec 28, 2010
Issued Date -
N/A
app pub date -
Feb 3, 2005
filing date -
Feb 3, 2004
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method and system are provided for programming a plurality of memory devices arranged in parallel. In one embodiment of the present invention, the plurality of memory devices comprises first and second memory devices, and the method comprises providing successively the first address to the first memory device and the second address to the second memory device. The first address refers to a first group of storage locations in the first memory device and the second address refers to a second group of storage locations in the second memory device. The method then proceeds to load in parallel a string of data to the first and second memory devices so that the string of data is written simultaneously to the first group of storage locations in the first memory device and to the second group of storage locations in the second memory device.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully