Direct memory access system and method
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Nov 16, 2010
Grant Date -
May 14, 2009
app pub date -
Mar 14, 2008
filing date -
Nov 14, 2007
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A DMA system includes at lease one read bus, at least one write bus, at least one buffer memory bus, and a DMA controller. The DMA controller comprises a plurality of channels and a bus arbiter. The channels are electrically connected to the read bus, the write bus, and the buffer memory bus. A source address and a destination address of data for each channel are assigned by a control table. The bus arbiter performs bus arbitration and prioritizes data access among the read bus, the write bus, and the buffer memory bus.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully