Nonvolatile memory device storing data based on change in transistor characteristics
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United States of America Patent
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Nov 16, 2010
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app pub date -
Oct 3, 2005
filing date -
Oct 3, 2005
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Abstract
A nonvolatile memory device includes a pair of PMOS transistors, and a control circuit configured to operate in a store mode to apply to a first one of the PMOS transistors potentials that cause an NBTI degradation purposefully and to apply to a second one of the PMOS transistors potentials that cause no NBTI degradation while causing no current to flow between a source node and a drain node of the first one of the PMOS transistors, and to operate in a recall mode to set gate nodes of the PMOS transistors to a common potential to detect a difference in the NBTI degradation between said PMOS transistors.
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