Microprocessor with random number generator and instruction for storing random data
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United States of America Patent
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Oct 19, 2010
Grant Date -
May 24, 2007
app pub date -
Dec 25, 2006
filing date -
Nov 20, 2001
priority date (Note) -
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Abstract
A microprocessor includes a storage element that accumulates a variable number of bytes of random data. The microprocessor also includes a counter that maintains a count of the variable number of bytes accumulated in the storage element. The microprocessor also includes an instruction translator that translates an instruction specifying an address in a memory coupled to the microprocessor. The microprocessor also includes a store unit that stores to the memory at the address the variable number of bytes of random data from the storage element in response to the instruction translator translating the instruction. In one embodiment, the microprocessor atomically stores the count and the bytes accumulated in said buffer to the system memory. In one embodiment, an interrupt unit disables interrupts after the instruction translator translates the instruction and enables interrupts after execution of the instruction.
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