Handler and process for testing a semiconductor chips using the handler
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United States of America Patent
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Aug 10, 2010
Grant Date -
Feb 5, 2009
app pub date -
Jul 30, 2008
filing date -
Jul 30, 2007
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A test handler includes a loading unit including a loading picker and a loading ascending/descending unit, an unloading unit including an unloading picker and an unloading ascending/descending unit, and a chamber system. A passage site connects the loading unit and the chamber system, and also connects the chamber system and the unloading unit. The arrangement of the handler reduces the time for the loading and unloading processes by performing the loading and unloading processes on separate test trays located at separate loading and unloading positions.
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