Electronic circuit with compensation of intrinsic offset of differential pairs
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United States of America Patent
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Jun 15, 2010
Grant Date -
Sep 10, 2009
app pub date -
Dec 12, 2006
filing date -
Dec 16, 2005
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The invention relates to analog integrated electronic circuits using differential pairs. The proposal is for a method of automatic correction of offset voltage. The inputs (V1, V2) of the differential circuit are short circuited during a calibration phase distinct from the normal usage phase. A capacitor is charged through the difference of the output currents of the branches of the differential pair in this phase. The voltage at the terminals of the capacitor is compared with at least one threshold. During the normal usage phase following the calibration phase, the result of the comparison is kept in memory. In the normal usage phase, a correction is applied depending on the result kept in memory to a current source of a follower stage upstream of the differential pair.
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