Method of and circuit for sampling a frequency difference in an integrated circuit
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United States of America Patent
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May 4, 2010
Grant Date -
N/A
app pub date -
Feb 22, 2006
filing date -
Jun 29, 2005
priority date (Note) -
Expired
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Abstract
A method of sampling a frequency difference in an integrated circuit is disclosed. The method comprises the steps of receiving a clock signal in a first clock domain; comparing a count of the clock signal in the first clock domain to a predetermined value N; converting the result of the comparison to a second clock domain; and generating an error signal representing the difference between the count of the first clock signal and the count of a second clock signal in the second clock domain. A circuit for sampling a frequency difference in an integrated circuit is also disclosed.
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