Method of fabricating semiconductor device employing selectivity poly deposition
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United States of America Patent
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Apr 13, 2010
Grant Date -
Oct 11, 2007
app pub date -
May 31, 2007
filing date -
Dec 30, 2003
priority date (Note) -
Expired
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Abstract
A method for fabricating a semiconductor device employing a selectivity poly deposition is disclosed. The disclosed method comprises depositing selectivity poly on a gate poly and source/drain regions of the silicon substrate, and forming salicide regions on the gate and active regions from the deposited selectivity poly. Accordingly, the present invention employing selectivity poly deposition can reduce or minimize contact surface resistance and improve the electrical characteristics of the semiconductor device by reducing the surface resistance in a miniature semiconductor device. In addition, because the size of the gate electrode is getting small, the present invention can be used as an essential part of the future generations of nano-scale technology. Moreover, mass semiconductor production systems can promptly employ the present invention with existing equipment.
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