Serial line circuit, an apparatus implemented with a serial line circuit, and method thereof
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United States of America Patent
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Mar 30, 2010
Issued Date -
N/A
app pub date -
Feb 19, 2004
filing date -
Feb 19, 2004
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Abstract
In one embodiment, the invention relates to a serial line circuit that comprises a serial information (SI) bus and at most two isolators interposed between a pair of programmable devices. In the TRANSMIT direction, a first programmable device is configured to multiplex serial data received from a plurality of serial UARTs and to route such data to the second programmable device over the SI bus and through a first isolator. In the RECEIVE direction, the second programmable device is configured to sample data from a plurality of serial interconnects and to route the sampled data to the first programmable device. The sampled data is routed over the SI bus and through a second isolator. The data transmission over the SI bus is in accordance with a proprietary serial transmission protocol described below.

First Claim
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP | 1701 EAST MOSSY OAKS ROAD SPRING TX 77389 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Adam, Joel F | Cupertino, US | 5 | 49 |
Martinson, Jerry | San Jose, US | 3 | 23 |
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Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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