Electronically compensated LCD assembly

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7671946
APP PUB NO 20070085972A1
SERIAL NO

11550041

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The invention relates to a method of electronic contrast enhancement for an LCD panel for use in an imaging device. The method comprises the step of coupling the LCD panel with a trim retarder in a pre-determined azimuthal orientation for at least partially compensating the residual in-plane retardance, followed by the step of non-mechanical fine-tuning of a dark state of the LCD panel. In the preferred embodiment, the fine-tuning of the dark state of the LCD panel is realized by adjusting the dark-state magnitude of the LC voltage. The method can be used in batch, e.g. wafer-level manufacturing of integrated trim retarder/LCD panels assemblies that can be electronically tuned to provide high on/off contrast.

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Patent Owner(s)

Patent OwnerAddress
JDS UNIPHASE CORPORATION1768 AUTOMATION PARKWAY SAN JOSE CA 95131

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Pradhan, Apurba San Francisco, US 6 77
Tan, Kim Leong Santa Rosa, US 24 682
Taylor, Andrew Thomas Santa Rosa, US 3 21

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  • G03B Class
  • 8.71 % this patent is cited more than
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Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges9977314359211512343401 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 90100 +050100150200250300350400450500550600650700750800850

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