Multilayer wiring board and method for testing the same
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United States of America Patent
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Feb 2, 2010
Grant Date -
Aug 28, 2008
app pub date -
Feb 27, 2008
filing date -
Feb 28, 2007
priority date (Note) -
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Abstract
A multilayer wiring board has a ceramic substrate, on which a multilayer wiring section is formed. The ceramic substrate has an internal conductor layer, which is connected to a test pad. The first conductor layer is formed, and then an electric capacitance is measured between the test pad and a wiring pattern of the first conductor layer. On the other hand, an electrical capacitance is calculated under the normal wiring pattern condition. The measured value is compared to the calculated value to determine whether the wiring pattern is good or bad. Similar measurements and comparisons are carried out for each of the second through fifth conductor layers to determine whether a three-dimensional wiring path is good or bad. As the ceramic substrate has an internal conductor layer, the electric capacitance of the wiring can be measured without an overall grounded layer in the multilayer wiring section, which is a characteristic part different from others among a variety of the multilayer wiring boards.
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