Method for calculating high-resolution wafer parameter profiles
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United States of America Patent
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Jan 26, 2010
Grant Date -
Jun 16, 2005
app pub date -
Dec 15, 2003
filing date -
Dec 15, 2003
priority date (Note) -
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Abstract
An embodiment of the present invention provides a method to utilize data from many different die sizes and products so that highly detailed wafer profiles can be generated that have an improved signal to noise ratio and spatial resolution. Instead of being limited to single die size like normal wafer maps, this method takes advantage of multiple die sizes and their variation in placement on the wafer to increase the information available about the wafer patterns.
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