Method to fabricate gate electrodes

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7648898
APP PUB NO 20090206336A1
SERIAL NO

12033487

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Abstract

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A method for fabricating a semiconductor device comprises depositing a first layer of oxide on at least a portion of a channel of a transistor. The method further comprises depositing a layer of nitride on the first layer of oxide and etching at least a portion of the layer of nitride to the first layer of oxide. The method further comprises depositing a second layer of oxide and planarizing the oxide to expose at least a portion of the layer of nitride. The method further comprises stripping at least a portion of the layer of nitride to create one or more notches and removing at least a portion of the first layer of oxide. The method further comprises depositing a layer of polysilicon, wherein at least a portion of the layer of polysilicon is deposited into at least one of the one or more notches.

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Patent Owner(s)

Patent OwnerAddress
MIE FUJITSU SEMICONDUCTOR LIMITED2000 MIZONO TADO-CHO KUWANA MIE 511-0118

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Banna, Srinivasa R San Jose, US 17 67

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