Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays
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United States of America Patent
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Jan 5, 2010
Grant Date -
Sep 14, 2006
app pub date -
Jan 3, 2006
filing date -
Jan 3, 2005
priority date (Note) -
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Abstract
Memory cells comprising: a semiconductor substrate having a source region and a drain region disposed below a surface of the substrate and separated by a channel region; a tunnel dielectric structure disposed above the channel region, the tunnel dielectric structure comprising at least one layer having a small hole-tunneling-barrier height; a charge storage layer disposed above the tunnel dielectric structure; an insulating layer disposed above the charge storage layer; and a gate electrode disposed above the insulating layer are described along with arrays thereof and methods of operation.
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