Asynchronous phase acquisition unit with dithering
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United States of America Patent
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Nov 17, 2009
Grant Date -
May 22, 2008
app pub date -
Nov 14, 2007
filing date -
Nov 17, 2006
priority date (Note) -
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Abstract
A digital phase locked loop includes a phase acquisition unit receiving a sampled input signal and applying its output to a first input of a digital phase detector, a digital controlled oscillator producing a digital output, and a feedback path coupling the digital output of the digital controlled oscillator to a second input of the digital phase detector in the digital domain. The input signal may be sampled asynchronously.
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