Wafer-scale microcolumn array using low temperature co-fired ceramic substrate
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United States of America Patent
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Oct 6, 2009
Grant Date -
Jun 22, 2006
app pub date -
Oct 24, 2005
filing date -
Dec 20, 2004
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Abstract
Provided is a wafer-scale microcolumn array using a low temperature co-fired ceramic (LTCC) substrate. The microcolumn array includes a LTCC substrate having wirings and wafer-scale beam deflector arrays, which are attached to at least one side of the LTCC substrate and has an array of deflection devices deflecting electron beams. The wafer-scale microcolumn array using the LTCC substrate makes it possible to significantly increase the throughput of semiconductor wafers, simplify its manufacturing process, and lower its production cost.
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