System and method for efficient power throttling in multiprocessor chip
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Sep 29, 2009
Grant Date -
N/A
app pub date -
May 6, 2005
filing date -
May 6, 2005
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method for limiting power consumption in a multiprocessor chip is provided. In this method, a read or write request is received by the memory controller, which controls a memory that is external to the multiprocessor chip. The memory controller includes a bank counter that keeps track of the number of read or write requests received by the memory controller. At every clock cycle, the bank counter value is compared with a threshold value to determine whether the counter value is equal to the threshold value. If the bank counter value is determined to be equal to the threshold value, then any subsequent incoming read or write requests are blocked. The bank counter value is incremented each time a read or write request is sent to the memory.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully