Method and system for logic design for cell projection particle beam lithography

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United States of America Patent

PATENT NO 7579606
APP PUB NO 20080128637A1
SERIAL NO

11607305

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Abstract

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A method for particle beam lithography, such as electron beam (EB) lithography, includes predefining a stencil design having a plurality of cell patterns with information from a cell library, fabricating the stencil design, synthesizing a functional description into a logic circuit design after predefining the stencil design so that one or more characteristics of the stencil design are considered during synthesizing of the functional description into the logic circuit design, optimizing the logic circuit design, generating a layout design from the optimized logic circuit design, and forming the logic circuit on a substrate according to the stencil design and the layout design.

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Patent Owner(s)

Patent OwnerAddress
D2S INC4040 MOORPARK AVE SUITE 250 SAN JOSE CA 95117

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fujimura, Akira Saratoga , US 225 2554
Matsushita, Shohei Yokohama , JP 12 189
Mitsuhashi, Takashi Fujisawa , JP 51 1558
Yoshida, Kenji Tokyo , JP 376 4182

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