Automatic multiplexing system for automated wafer testing
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United States of America Patent
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Aug 18, 2009
Grant Date -
Oct 2, 2008
app pub date -
Mar 30, 2007
filing date -
Mar 30, 2007
priority date (Note) -
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Abstract
A parametric test system is for testing devices in dice in a semiconductor wafer, each die having a plurality of pads for electrically connecting to the device in the die. A tester of the system has a plurality of input/output lines for providing and receiving electrical signals during a device test. Multiplexer circuitry of the test system includes a plurality of networks of automated switches. The multiplexer circuitry is configured to receive electrical signals on the input lines from the tester and to provide the electrical signals to a wafer prober, wherein the multiplexer circuitry is configured to restrict how the electrical signals can be provided to the networks of automated switches. As a result of the multiplexer being configured to restrict how the electrical signals can be provided to the networks of automated switches, the configuration of the networks of automated switches can be simplified.
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