Use of voids between elements in semiconductor structures for isolation
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United States of America Patent
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Aug 4, 2009
Grant Date -
Jan 5, 2006
app pub date -
Aug 22, 2005
filing date -
May 21, 2003
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Abstract
A flash EEPROM or other type of memory cell array having adjacent charge storage elements is formed with a gas filled void between them in order to reduce the level of capacitive coupling between storage elements, thus reducing cross-coupling between charge storage elements and resulting errors occurring in the data read from the array.
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