Semiconductor electrochemical etching processes employing closed loop control
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United States of America Patent
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Jul 14, 2009
Grant Date -
Sep 15, 2005
app pub date -
Jan 21, 2005
filing date -
Jan 21, 2004
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Abstract
Methods and apparatus for providing closed-loop control over an electrochemical etching process during porous semiconductor fabrication enhance the quality of the porous semiconductor materials, especially those contained structural variations (such as porosity or morphology variations) along the thickness of said porous semiconductors. Such enhancement of the control over the electrochemical etching process is highly desired for many applications of porous semiconductor materials.
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