Block level routing architecture in a field programmable gate array
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United States of America Patent
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Jul 7, 2009
Issued Date -
N/A
app pub date -
Feb 20, 2008
filing date -
Mar 6, 2000
priority date (Note) -
Expired
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Abstract
, respectively. Each BC routing channel has nine interconnect conductors which are grouped into three groups of three interconnect conductors. Each group of three interconnect conductors is connected to a first side of a Extension Board (EB) 3×3 switch matrix. A second side of each EB 3×3 switch matrix is coupled to the E-tab. Between adjacent B1 blocks, in both the horizontal and vertical directions, the leads on the second side of a first EB 3×3 switch matrix may be coupled to the leads on the second side of second EB3×3 switch matrix by BC criss-cross extension.
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