Semiconductor device including MOS field effect transistor having offset spacers or gate sidewall films on either side of gate electrode and method of manufacturing the same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7544573
APP PUB NO 20080070359A1
SERIAL NO

11979025

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Abstract

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First and second impurity doped regions are formed in a semiconductor substrate. A first gate electrode is formed on the first impurity doped region with a first gate insulation film interposed therebetween. A second gate electrode is formed on the second impurity doped region with a second gate insulation film interposed therebetween. A first sidewall insulation film is formed on either side of the first gate electrode. A second sidewall insulation film has a thickness different from that of the first sidewall insulation film and are formed on either side of the second gate electrode. A third sidewall insulation film is formed on the first sidewall insulation film on the side of the first gate electrode. A fourth sidewall insulation films have a thickness different from that of the third sidewall, insulation film and are formed on the second sidewall insulation film on the side of the second gate electrode.

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Patent Owner(s)

Patent OwnerAddress
HANS DWAYNE CARTOUCHE JR MR13948 NW 88TH CT HIALEAH FL 33018
THE CARTOUCHE CORPORATIONPO BOX 1982 DULUTH GA 30096

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tsuno, Hitoshi Yokohama, JP 26 110

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