Circuit with protection against electrostatic destruction
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United States of America Patent
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May 26, 2009
Grant Date -
May 4, 2006
app pub date -
Oct 26, 2005
filing date -
Oct 26, 2004
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A circuit with protection against electrostatic destruction comprises at least two sections (A, B) composed of a first and second section (A, B). Each of the sections (A, B) has its own working voltage system with a fundamental voltage (USS or USS1) and a supply voltage (UDD or UDD1), and at least one connection (SC) between an information terminal (SA) of the first section (A) and an information terminal (SB) of the second section (B) to transfer information between the first section (A) and the second section (B). The connection (SC) has a transistor circuit with at least one transistor (X) of the first section (A), a resistance (R1), and a first transistor (E) of the second section (B), wherein the first transistor (X) is connected between the fundamental voltage (USS) of the first section (A) and the resistance (R1), and the first transistor (E) of the second section (B) is connected between the resistance (R1) and the supply voltage (UDD1) of the second section (B).
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