DC offset canceling circuit
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United States of America Patent
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May 26, 2009
Grant Date -
Nov 13, 2008
app pub date -
May 8, 2007
filing date -
May 8, 2007
priority date (Note) -
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Abstract
The present invention provides a $ for canceling DC offset, comprising: a first circuit accumulating a first square value of a plurality of signal values in a time period; a second circuit calculation a second square value of an accumulation of said signal values in said time period, wherein said square value is divided by a quantity of said signal values in said time period to generate a DC offset value; and a third circuit, connected to said first circuit and second circuit, calculating a difference between said first square value and said DC offset value.
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