Non-volatile memory including assist gate
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United States of America Patent
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May 5, 2009
Grant Date -
Aug 24, 2006
app pub date -
Aug 26, 2005
filing date -
Feb 24, 2005
priority date (Note) -
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Abstract
A non-volatile memory is provided. An assist gate structure is formed on a substrate such that the width at the bottom of the assist gate structure is greater than the width at the top of the assist gate structure. A floating gate is formed on one side of the assist gate structure and disposed between a word line and the substrate. The width at the bottom of the floating gate is smaller than the width at the top of the floating gate. The word line, the floating gate and the assist gate structure together form a memory unit. A tunneling dielectric layer is formed between the floating gate and the substrate. An inter-gate dielectric layer is formed between the word line, the floating gate and the assist gate structure. Source/drain regions are formed in the substrate on the respective sides of the memory unit.
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