Method for setting up a serial communication port configuration
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United States of America Patent
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Apr 28, 2009
Grant Date -
May 29, 2008
app pub date -
Sep 26, 2006
filing date -
Sep 26, 2006
priority date (Note) -
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Abstract
A method for setting up a serial communication port configuration is disclosed. The method comprises a hardware circuit of a motherboard having a plurality of digital logic gates and a plurality of chips disposed thereon, wherein a process is initiated when the digital logic gates receive a high or low electric potential signal inputted by a general programmable input/output (GPIO), and the processed high or low electric potential signal is transmitted to the chips for further processing and outputting the same to execute setting up of the serial communication port configuration.
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