Enhanced segmented channel MOS transistor with narrowed base regions

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United States of America Patent

PATENT NO 7508031
APP PUB NO 20070128782A1
SERIAL NO

11668756

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Abstract

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By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably produced. Ridges on the corrugated substrate can be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping, “wrapped” gates, epitaxially grown conductive regions, epitaxially grown high mobility semiconductor materials, high-permittivity ridge isolation material, and narrowed base regions can be used in conjunction with the segmented channel regions to further enhance device performance.

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Patent Owner(s)

Patent OwnerAddress
SYNOPSYS INCSUNNYVALE CA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Liu, Tsu Jae King Fremont, US 3 561
Lu, Qiang Foster City, US 86 2233

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  • 268 Citation Count
  • H01L Class
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Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges7814908714622651381027160483613101 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +01002003004005006007008009001000110012001300140015001600

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