Apparatus and method for reducing leakage of unused buffers in an integrated circuit

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United States of America Patent

PATENT NO 7463061
SERIAL NO

11185426

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Abstract

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A reduced-leakage interconnect circuit includes a buffer having an input and an output, at least one multiplexer transistor coupled between a multiplexer input node and the input of the buffer, and a fixed-state multiplexer transistor coupled between a fixed-state multiplexer input node and the input of the buffer, the fixed-state multiplexer input node having a potential of either less than zero volts or more than V.sub.CC present on it.

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Patent Owner(s)

Patent OwnerAddress
MICROSEMI SOC CORP2355 WEST CHANDLER BOULEVARD CHANDLER AS 85224

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bellippady, Vidya Cupertino, CA 6 105
Greene, Jonathan W Palo Alto, CA 37 1414

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