Circuit arrangement having a load transistor and a voltage limiting circuit and method for driving a load transistor
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United States of America Patent
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Nov 18, 2008
Grant Date -
Sep 1, 2005
app pub date -
Feb 11, 2005
filing date -
Feb 13, 2004
priority date (Note) -
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Abstract
The invention relates to a circuit arrangement having connecting terminals (K1, K2) for application of a supply voltage (V+) and having a load transistor (M) for connecting a load (Z) to the supply voltage, said load transistor having a control terminal (G) and a first and second load terminal (D, S), the control terminal (G) of the load transistor (2) being coupled to a drive terminal (IN) for application of a drive signal (Sin). A voltage limiting circuit (10) is connected between one (D) of the load terminals and the drive terminal (G) of the transistor, a deactivation circuit (20) being provided, which is designed to deactivate the voltage limiting circuit (10) in a manner dependent on the supply voltage (V+).
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