Device package and methods for the fabrication and testing thereof
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United States of America Patent
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Nov 11, 2008
Issued Date -
N/A
app pub date -
Oct 31, 2006
filing date -
Sep 15, 2003
priority date (Note) -
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Abstract
Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
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