Integrated circuit testing module including address generator
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United States of America Patent
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Nov 4, 2008
Grant Date -
N/A
app pub date -
Mar 7, 2006
filing date -
Sep 28, 2001
priority date (Note) -
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Abstract
Systems and methods of testing integrated circuits are disclosed. The systems include a test module configured to operate between an automated testing equipment and an integrated circuit to be tested. The testing interface is configured to test the integrated circuit at a higher clock frequency than the automated testing equipment is configured to operate. In order to do so, the testing interface includes components configured for generating addresses and test data to be provided to the integrated circuit. A variety of test data patterns can be produced and the test data can be address dependent.
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